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  1 of 15 062702 features  2.5v power-on reset  3.3v (or 3v) power-on reset  two referenced comparators with separate outputs for monitoring additional supplies  internal power is drawn from higher of either the in 2.5v input or the in 3.3v input  excellent for systems designed to operate with multiple power supplies  asserts resets during power transients  pushbutton reset input for system override  maintains reset for user configurable times of 10ms, 100ms, or 1s  watchdog timer for software monitoring (ds1831d)  precision temperature-compensated voltage reference and voltage sensor  16-pin dip and 16-pin 150mil so available  operating temperature of -40c to +85c pin assignment description the ds1831c multisupply monitor and reset monitors up to four system voltages: 2.5v supply, 3.3v (or 3v) supply, and two additional user configurable voltage monitors. ds1831 power for internal operation comes from the higher voltage level of the 3.3v i nput or the 2.5v input. one of these inputs must be greater than 1v for device operation. pushbutton (m anual reset) fu nctionality is provided for the 2.5v ds1831c/d/e 3.3v/2.5v multisupply micromonitor www.maxim-ic.com 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 in 3.3v rst 3.3v tol 3.3v td 3.3v pbrst 3.3v n mi1 n mi2 mpbrst in 2.5v rst 2.5v tol 2.5v td 2.5v pbrst 2.5v in1 in2 gnd ds1831c 16-pin (300mil) dip & 16-pin ( 150mil ) so 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 in 3.3v rst 3.3v tol 3.3v td 3.3v pbrst 3.3v n mi1 wds td wd in 2.5v rst 2.5v tol 2.5v td 2.5v pbrst 2.5v in1 st gnd ds1831d 16-pin (300mil) dip & 16-pin ( 150mil ) so 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 in 3.3v rst 3.3v tol 3.3v td 3.3v pbrst 3.3v n mi1 n mi2 mpbrst in 2.5v rst 2.5v tol 2.5v td 2.5v pbrst 2.5v in1 in2 gnd ds1831e 16-pin (300mil) dip & 16-pin ( 150mil ) so
ds1831c/d/e 2 of 15 reset, the 3.3v reset or for a ll reset outputs by the master pushbutton. the ds1831d replaces one reference comparator and the master pushbutton with watchdog and the ds1831e replaces the 3.3v pbrst with a last reset status output. tol and td inputs allow user c onfiguration of the ds1831 for multiple applications. the tol inputs configure the tolerance for the specified output a nd the td inputs configure the reset time delays. pin description in 2.5v 2.5v power supply input mpbrst td wd master pushbutton (ds1831c/e) watchdog time delay select (ds1831d) rst 2.5v 2.5v reset open drain output nm12 wds non-maskable inte rrupt 2 (ds1831c/e) watchdog status output (ds1831d) tol 2.5v selects 2.5v input tolerance nm11 non-maskable interrupt 1 td 2.5v selects 2.5v reset time delay pbrst 3.3v pbst 3.3v reset pushbutton (ds1831c/e) pushbutton status output (ds1831e) pbrst 2.5v 2.5v reset pushbutton td 3.3v select 3.3v reset time delay in1 sense input 1 tol 3.3v selects 3.3v input tolerance in2 st sense input 2 (ds1831c/e) watchdog strobe inputs (ds1831d) rst 3.3v 3.3v reset open drain output gnd ground in 3.3v 3.3v power supply input
ds1831c/d/e 3 of 15 block diagram figure 1 rst 33v v cc tolerance bias in 2.5v + - time delay 1.25v t.c. referenc e tol 2.5v ground v cc tolerance bias in 3.3v tol 3.3v time delay level sense & debounce mpbrst + - 100 k  td 2.5v td 3.3v 100 k  pbrst 3.3v pbrst 2.5v 100 k  + - + - in1 in2 nmi1 nmi2 rst 2.5v
ds1831c/d/e 4 of 15 operation?power monitor the ds1831 provides the functions of detecting out -of-tolerance conditions on a 3.3v (or 3v) and 2.5v power supply and warning a processor based system of impending power failure. when an input is detected as out-of-t olerance on either voltage input the rst for that supply will be forced active low. when that input returns to a valid state the associated rst will remain active for the time delay selected with the associated td input and then return to an inactive state until the next input out-of-tolerance condition. on power-up both resets are kept active for the select ed reset time after the associated power supply input has reached the selected tolerance. this allows the power supply and system power to stabilize before rst is released. all internal operating current for the ds1831 will be supplied by either the in 3.3v or in 2.5v input which ever has the highest voltage level. operation?tolerance select the ds1831 provides two tol inputs for individual cust omization of the ds1831 to specific application requirements. if the tol for the 2.5v supply is tied to the 2.5v input a 5% tolerance is selected. if the tol is connected to ground a 10% tolerance is select ed or if it is left unconnected a 15% tolerance is selected. if the tol for the 3.3v supply is tied to the 3.3v input a 5% tolerance is selected, a 10% tolerance is selected if it is connected to ground, a nd a 20% tolerance is selected if the input is left unconnected. these tolerance conditions are set at pow er up and can only be changed by power cycling the device. operation?reset ti me-delay select the ds1831 provides two td inputs for individual customization of rese t time delays and an additional one for the ds1831d watchdog. td inputs select time delays for the in 2.5v and in 3.3v resets outputs and the watchdog on the ds1831d. the reset time delays ar e shown in table 1. these allow the selection of minimum delays of 10ms, 100ms, and 1000ms. wiring an individual reset output to the pushbutton input of the other voltage reset allows custom reset timings or allows for the sequencing of the reset outputs. see figure 2. these time delays are set at power-up and cannot be changed after the device reaches an in-tolerance condition. td inputs/reset and watchdog time-delays table 1 reset time-delay td min typ max gnd 10ms 16ms 20ms float 100ms 160ms 200ms v cc 1000ms 1600ms 2000ms
ds1831c/d/e 5 of 15 pushbutton reset sequencing figure 2 note: the rst 2.5 volt output is connected to the in 3.3v via a 100k  resistor in the pushbutton input and therefore does not require a pull-up re sistor (an addition pull up can be us ed to accelerate responses.) if an external pull-up is used in this example it must be connected to the 3.3v power supply. operation?pushbutton reset the ds1831 provides three pushbutton inputs for manual reset of the device. pushbutton inputs for the 3.3v reset, 2.5v reset, and a master pushbutton reset (ds1831c and ds1831d only) input; provide multiple options for system control. the 3.3v pus hbutton reset and 2.5v pushbutton resets provide a simple manual reset for the associated reset output; while the master pushbutton reset forces all resets and nmi outputs active low. the 2.5v reset pushbutton input and the 3.3v reset pushbutton input provide ma nual reset control for each associated reset output. when the output asso ciated with a pushbutton input is not active, a pushbutton reset can be generated by pulling the associated pbrst pin low for at least 20s. when the pushbutton is held low the reset will be forced active and will remain active for a reset cycle after the pushbutton is released. see figure 2 for an application example that allows a user to sequence the reset outputs. a master pushbutton reset cycle can be star ted if at least one voltage input (in 2.5v , in 3.3v , in1, or in2) is in tolerance and at least one output is active. a master pushbutton reset is generated by pulling the mpbrst pin low for at least 20s. when the pushbutton is held low all outputs are forced active and will remain active for a reset or nmi time delay after the pushbutton is re leased. the master pushbutton input is pulled high through an internal 100k  pull up resistor and debounced via internal circuitry. see figure 3 for an application example. figures 4 and 5 for the timing diagram. the 2.5v and 3.3v pushbutton reset inputs are pulled high through an internal 100k  pull up resistor to the voltage input, which is associated with that pus hbutton. the master pushbutton is pulled to the greater of the in 2.5v and in 3.3v inputs. rst 2.5v pbrst 3.3v gnd td 2.5v in 3.3v in 2.5v rst 3.3v tol 3.3v pbrst 2.5v tol 2.5v ds1831c td 3.3v 2.5v supply 3.3v supply 1 2 3 4 5 16 15 14 13 12
ds1831c/d/e 6 of 15 pushbutton reset figure 3 timing diagram?mast er pushbutton reset figure 4 timing diagram?2.5v or 3.3v pushbutton reset figure 5 rst 2.5v gnd td 2.5v in 2.5v pbrst 2.5v tol 2.5v 2.5v supply 1 2 3 4 5 16 15 14 13 12 ds1831c 10 k  v ih v il t pdly t pb t rst mpbrst rst 2.5v and rst 3.3v v oh t nmi nmi1 and nmi2 v oh v ih v il t pdly t pb t rst pbrst 2.5v (or pbrst 3.3v ) rst 2.5v (or rst 3.3v ) v oh v il
ds1831c/d/e 7 of 15 operation?pushbutton status the ds1831e provides a master pushbu tton status open drain output. the pbst output indicates the status of the most recent reset condition. if the last reset was generated by the master pushbutton input it would maintain a low condition until cleared by anot her event (except the master pushbutton) generating a reset. once cleared it will remain high until the master pushbutton is pulled low generating a reset condition. the pbst output is open drain and will require a pull-up resistor on the output to maintain a valid condition. the value of the pull up resistor is not critical in most cases but must be set low enough to pull the output to a high state. a common value used is 10k  (see figure 6). ds1831e application example figure 6 output valid conditions the ds1831 can maintain valid outputs as long as one input remains above 1.0v. accurate voltage monitoring additionally requires that either the 3.3v in or 2.5v in input be above 1.5v. if this condition is not met and at least one of the supply inputs are at or above 1.0v all outputs are maintained in the active condition. the ds1831 requires pull-up resistors on the outputs to maintain a valid output. the value of the pull up resistor is not critical in most cases but must be set low enough to pull the output to a high state. a common pull-up resistor value used is 10k  (see figure 7). pbrst 2.5v gnd nmi2 in1 nmi1 v sense1 in2 mpbrst v sense2 v cc 10 k  ds1831e rst 2.5v td 2.5v in 2.5v tol 2.5v 2.5v pbst in 3.3v rst 3.3v tol 3.3v td 3.3v 3.3v supply v cc 10 k  1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
ds1831c/d/e 8 of 15 application diagram?open drain outputs figure 7 note: if outputs are at different voltages the out puts can not be connected to form a wired and. operation?non-maskable interrupt the ds1831 has two referenced comparators (ds1831d has only one referenced comparator) that can be used to monitor upstream voltages or other system speci fic voltages. each comparator is referenced to the 1.25v internal band gap reference and controls an open-drain output. when a voltage being monitored decays to the voltage sense point, the ds1831 pulses the nmi output to the active state for a minimum 10s. the comparator detection circuitry also has bu ilt-in hysteresis of 100v. the supply must be below the voltage sense point for a pproximately 2s before a low nmi will be generated. in this way, power supply noise is minimized in the monitoring function, re ducing false interrupts. see figure 8 for the non- maskable timing diagram. versatile trip voltages can be configured by the use of an external resistor divider to divide the voltage at a sense point to the 1.25v trip levels of the referen ced comparators. see figure 9 for an example circuit diagram and sample equations. the equations demonstrate a design pr ocess to determine the resistor values to use. connecting one or both nmi outputs to one of the reset specific pbrst s allows the non-maskable interrupt to generate an automa tic reset for the reset time period when an out-of-tolerance condition occurs in a monitored supply. an example is shown in figure 9. the output associated with the specific input will be held low if the voltage on the input pin is less than 1.25v. if the voltage is above 1.25v the output will not sink current and will be pulled up by the required pull-up resistor. the value of the resistors is not critical in most cases but must be set low enough to pull the output to a high state. a common value used is 10k  . if an nmi output is connected to a pushbutton input an additional pull-up resistor can be used (t o improve speed of transitions) but is not required. during a power-up, any detected in pin levels above v tp by the comparator are disabled from generating an inactive (high) interrupt until at least one supply on the v in inputs rises above 1.5v. all nmi outputs will be held active (low) until at least one v in reaches 1.5v at which point the nmi outputs will be based on the value of the associated in input. rst 2.5v pbrst 3.3v gnd td 2.5v in 3.3v in 2.5v rst 3.3v tol 3.3v pbrst 2.5v tol 2.5v ds1831c td 3.3v 2.5v supply 3.3v supply 1 2 3 4 5 16 15 14 13 12 10 k  10 k 
ds1831c/d/e 9 of 15 timing diagram?non-maskable interrupt figure 8 non-maskable interrupt circuit example figure 9 example: v sense1 = 11.50 volts trip point v sense1 = r2 r2 r1  x 1.25v therefore: 11.50v = k 100 k 100 r1  x 1.25v resulting in: r1 = 820 k  repeat the same steps to solve for r3 and r4 with v sense2 . v in >1.25 v v tp v tp(min) v tp(max) t ipd nmi v ol v tp v tp(min) v tp(max) v oh t nmi r1 ds1831c gnd in1 v sense1 r2 in2 r3 v sense2 r4 v cc 10 k  pbrst 2.5v pbrst 3.3v nmi1 nmi2 mpbrst  
ds1831c/d/e 10 of 15 operation?watchdog timer the watchdog timer function (ds1831d only) forces the wds signal active (low) when the st input does not have a transition (high-to -low or low-to-high) within the predetermined time period. the time-out period is determined by the condition of the td wd pin. if td wd is connected to ground the minimum watchdog time-out would be 10ms, td floating would yield a minimum time-out of 100ms, and td wd connected to v cc would provide a time-out of 1000ms minimum. time-out of the watchdog starts when at least one of the rst outputs becomes inactive (high). if a transition occurs on the st input pin prior to time-out, the watchdog timer is reset and begins to time-out again. if the watchdog timer is allowed to time-out, then the wds output is pulsed active for a minimum of 100s. the wds output is an open-drain output and must be pu lled up externally. in most applications this output would be connected to one of the pushbutt on inputs and would not require an external pull-up resistor. the value of the resistors is not critical in most cases but must be set low enough to pull the output to a high state. a common value used is 10k  . if a wds output is connected to a pushbutton input an additional pull-up resistor can be used (to imp rove speed of transitions) but is not required. the st input can be derived from many microprocessor outputs. the most typical signals used are the microprocessor address signals, da ta signals, or control signals. when the microprocessor functions normally, these signals would, as a matter of routine, cause the watchdog to be reset prior to time-out. to guarantee that the watchdog timer does not time-out, a transition must occur at or less than the minimum times shown in table 1. a typical circuit example is shown in figure 10. the watchdog timing is shown in figure 11. the ds1831a watchdog function cannot be disabled. the watchdog strobe i nput must be strobed to avoid a watchdog time-out however the watc hdog status output can be disconne cted yielding the same result. watchdog circuit example figure 10 r1 pbrst 2.5v pbrst 3.3v ds1831d gnd wds in1 nmi1 v sense1 r2 st td wd p v cc 10 k 
ds1831c/d/e 11 of 15 timing diagram?strobe input figure 11 reset timing diagram?power up figure 12 t rpu v oh v intp v intp (min) v intp (max) t r in 2.5v (or in 3.3v ) rst 2.5v (or rst 3.3v ) invalid edges valid edges indeterminate edges min max st wds t st t td
ds1831c/d/e 12 of 15 reset timing diagram?power down figure 13 t f in 2.5v (or in 3.3v ) t rpd v ol v intp v intp (min) v intp (max) rst 2.5v (or rst 3.3v )
ds1831c/d/e 13 of 15 absolute maximum ratings* voltage on in 2.5v or in 3.3v pins relative to ground -0.5v to +6.0v voltage on either rst relative to ground -0.5v to the greater of in 2.5v + 0.5v or in 3.3v + 0.5v voltage on pbrst 3.3v relative to ground -0.5v to in 3.3v + 0.5v voltage on pbrst 2.5v relative to ground -0.5v to in 2.5v + 0.5v voltage on mpbrst, in1, in2 relative to ground -0.5v to the greater of in 2.5v + 0.5v or in 3.3v + 0.5v operating temperature range -40c to +85c storage temperature range -55c to +125c soldering temperature see ipc/jedec j-std-020a specification * this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. recommended dc operating conditions (-40  c to +85  c) parameter symbol min max units notes in 2.5v (supply voltage) v in 1.0 5.5 v 1 in 3.3v (supply voltage) v in 1.0 5.5 v 1 2v2* st and mpbrst input high level v ih v int -0.4 v int + 0.3 v3* pbrst 3.3v input high level v ih 2in 3.3v + 0.3 v pbrst 2.5v input high level v ih 2in 2.5v +0.3 v st, pbrst 3.3v , pbrst 2.5v and mpbrst input low level v il -0.3 0.5 v * v int is the greater voltage level of the in 2.5v or in 3.3v . dc electrical characteristics (-40  c to 85  c; in 2.5v , in 3.3v = 1.0v to 5.5v) parameter symbol min typ max units notes input leakage i il -1.0 +1.0  a 4 output current @ 0.4v i ol +10 ma operating current @  5.5v i cc 80 100  a 5 operating current @  3.6v i cc 60 80 a 6 in 3.3v trip point (tol 3.3v = in 3.3v )v intp 2.98 3.06 3.15 v in 3.3v trip point (tol 3.3v = gnd) v intp 2.80 2.88 2.97 v in 3.3v trip point (tol 3.3v = float) v intp 2.47 2.55 2.64 v in 2.5v trip point (tol 2.5v = in 2.5v )v intp 2.250 2.312 2.375 v in 2.5v trip point (tol 2.5v = gnd) v intp 2.125 2.187 2.250 v in 2.5v trip point (tol 2.5v = float) v intp 2.000 2.062 2.125 v in input trip points v tp 1.15 1.25 1.30 v
ds1831c/d/e 14 of 15 capacitance (t a = +25  c) parameter symbol max units notes input capacitance c in 5pf input capacitance c out 7pf ac electrical characteristics (-40  to 85  c; in 2.5v , in 3.3v = 1.0v to 5.5v) parameter symbol min typ max units notes reset active time (td=low) t rst 10 16 20 ms 7 reset active time (td=float) t rst 100 160 200 ms 7 reset active time (td=high) t rst 1000 1600 2000 ms 7 v cc detect to rst t rpu see reset active time ms 7 v cc detect to rst t rpd 210  s 8 vin detect to nmi t ipd 210  s 8 nmi active time t nmi 20  s pbrst = v il t pb 20  s pbrst stable low to reset active t pdly 50  s watchdog timeout (td (wd) =low) t td 10 16 20 ms watchdog timeout (td wd =float) t td 100 160 200 ms watchdog timeout (td wd =high) t td 1000 1600 2000 ms st pulse width t st 10 ns v in slew rate (v intp(max) to v intp(min) ) t f 300  s v in slew rate (v intp(max) to v intp(min) ) t r 0ns notes: 1) all voltages are referenced to ground. 2) measured with both in 3.3v & in 2.5v  2.7v. 3) measured with both in 3.3v & in 2.5v  2.7v. 4) all pushbutton inputs are internally pulled to the a ssociated supply in input or the greatest supply in input for the mpbrst with an internal impedance of 100k  5) measured with outputs open and in 3.3v or in 2.5v  5.5v. 6) measured with outputs open and in 3.3v or in 2.5v  3.6v. 7) measured using t r = 5s. 8) noise immunity - pulses <2s at a trip level will not cause a rst or nmi .
ds1831c/d/e 15 of 15 ordering information ordering part number package type description ds1831c 16-pin dip 300mil 2.5v/3.3v multisupply monitor ds1831cs 16-pin so 150mil 2.5v/3.3v multisupply monitor ds1831d 16-pin dip 300mil 2.5v/3.3v multisupply monitor w/watchdog ds1831ds 16-pin so 150mil 2.5v/3.3v multisupply monitor w/watchdog ds1831e 16-pin dip 300mil 2.5v/3.3v multisupply monitor w/pushbutton status ds1831es 16-pin so 150mil 2.5v/3.3v multisupply monitor w/pushbutton status * add ?/t&r? for tape and reeling of surface mount packages.


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